Wafer Surface Defect Detection AI

Catch scratches, particles, and edge chips on every wafer, before the next layer builds on a defect.
Shipping container with OCR output

Wafer Surface Defect Detection AI Across Fabs, OSATs, and Wafer Manufacturing

Deploy Anywhere, Run Everywhere

Run wafer surface defect detection on the edge, on-prem, in your VPC, or via API, wherever your fab, probe, and packaging lines need it.

One Platform, Full Adoption

Tools every fab team can adopt, from process and yield engineers to equipment engineers, operators, and quality leads, no separate ML team required to ship and own inspection models.

Secure, Compliant, and Audit-Ready

Data stays safe with SOC 2 Type II compliance, encrypted data, and an uptime SLA, with validation documentation that supports ISO 9001, SEMI-based wafer specifications, and customer qualification and audit requirements.
Scratch & Micro-Crack Detection
Particle & Contamination Flags
Edge Chip & Notch Inspection
Stain & Discoloration Detection
Backside & Bare Wafer Inspection
Lot & Wafer-Level Trend Records
Scratch & Micro-Crack Detection
Particle & Contamination Flags
Edge Chip & Notch Inspection
Stain & Discoloration Detection
Backside & Bare Wafer Inspection
Lot & Wafer-Level Trend Records
Scratch & Micro-Crack Detection
Particle & Contamination Flags
Edge Chip & Notch Inspection
Stain & Discoloration Detection
Backside & Bare Wafer Inspection
Lot & Wafer-Level Trend Records
Scratch & Micro-Crack Detection
Particle & Contamination Flags
Edge Chip & Notch Inspection
Stain & Discoloration Detection
Backside & Bare Wafer Inspection
Lot & Wafer-Level Trend Records

Talk to a vision AI engineer who's shipped wafer inspection.

A single scratch that crosses thirty die, cassette of wafers nicked by a worn end effector, or contamination excursion that runs three lots before final test finds it can mean yield loss that multiplies with every layer, a scrapped lot worth a car, or a customer qualification put at risk. Bring us your toughest wafer surface inspection problem and we'll map a working solution.
  • Solution architecture for ISO 9001, SEMI-based specifications, and customer qualification environments
  • Live demo on your wafer imagery, macro inspection photos, or edge and backside captures
  • Deployment options: edge, on-prem, air-gapped, or VPC, with integration into fab MES, host systems, and yield management
  • ROI modeling against scrapped wafers, excursion depth, manual macro inspection time, and escaped handling damage
  • We will connect you with an AI subject matter expert on our team based on your answers.
    What challenges would you like to solve with vision AI?
    Where will you run vision AI?
    Are you replacing a current solution with AI or will this be a new solution?
    How many detections do you anticipate per month?
    Describe the business problem you would like to solve.
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    $0 million
    Saved by automatically detecting defects
    0%
    Less time spent manually tracking inventory
    0%
    Reduction in customer return rate

    Inspect Every Wafer at Every Handoff, with Vision AI

    Add a real-time inspection layer to every wafer with vision AI for wafer surface defect detection. Built for the operations where a scratch picked up in handling crosses thirty die and rides through every remaining layer, a worn end effector chips wafer edges for a week before anyone connects the breakage, or a stain excursion surfaces at final test with three lots already behind it. Whether you're running a front-end fab, an OSAT, a bare wafer operation, or compound semiconductor lines, Roboflow inspects wafers at the handoffs and steps you choose, with per-wafer records tied to lot, step, and tool.

    Front-Side and Surface Defects:

    • Catch scratches, particles, and contamination on polished and patterned surfaces at macro scale
    • Detect stains, discoloration, and film anomalies that signal a process step drifting
    • Flag repeating defect signatures across wafers, so a stepper or handler leaving its mark gets caught by pattern, not luck

    Edge, Notch, and Backside Inspection:

    • Catch edge chips, notch damage, and micro-cracks from handling before they become breakage in a tool
    • Inspect backside contamination and scratches that transfer to chucks and ride into lithography
    • Cover bare wafers at incoming and post-lap, slice, and polish steps with the same platform

    Lots, Excursions, and Systems Integration:

    • Read laser-scribed wafer IDs and tie every inspection to wafer, lot, step, and tool
    • Trend defects by tool and step, so an excursion reads as a spike on one handler instead of a mystery at final test
    • Feed results into fab MES, host systems, and yield management through a standard API, with imagery behind every record

    Bring intelligence to every wafer today. Stop surface defects from becoming multiplied yield loss, scrapped lots, or qualification risk.

    More About Wafer Surface Defect Detection

    What is wafer surface defect detection with Vision AI?

    Wafer surface defect detection with vision AI uses computer vision models to inspect wafers at macro scale: scratches, particles, contamination, stains, edge chips, notch damage, and backside defects, on bare and patterned wafers. Models trained on your actual wafers, films, and layers inspect at the handoffs and steps you choose, read laser-scribed IDs, and tie every result to wafer, lot, step, and tool, with records that support ISO 9001 and customer qualification requirements.

    Can Vision AI inspect mirror-finish and patterned wafers?

    Wafer surfaces are the hard case: mirror polish that turns every light source into glare, thin films that shift color wafer to wafer, and patterned surfaces where millions of intentional structures look like noise to a rule-based system. Deep-learning models trained on your actual wafers learn the difference between the pattern, the film's normal color range, and a true defect, hold that judgment across layers and products, and flag low-confidence findings for engineer review instead of guessing. For sub-micron patterned defect inspection, dedicated brightfield, darkfield, and e-beam tools remain the instrument of record; vision AI covers the macro, edge, backside, and handling-damage layer around them.

    Does wafer inspection support our quality system and customer qualifications?

    Yes. Roboflow models can run as documented inspection controls inside your ISO 9001 quality system and SEMI-based wafer specifications, with per-wafer inspection records, imagery, model version history, and training data lineage that support customer qualifications, excursion reviews, and audits. Roboflow is the inspection engine; your quality and yield teams own the specifications and disposition rules.

    Can it integrate with our fab MES, host systems, and yield management?

    Yes. Roboflow Inference exposes a standard API and supports common industrial protocols, so inspection events flow into your existing systems: fab MES and host environments, yield management and defect data systems, and ERP platforms like SAP, through REST, MQTT, OPC UA, and direct database writes. Every event carries wafer ID, lot, step, tool, and imagery, so excursion investigations start from a record instead of a reconstruction, with a full audit trail behind every wafer.

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